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| author | Callum Linden <callum@lindenlab.com> | 2022-09-15 17:00:34 -0700 |
|---|---|---|
| committer | Callum Linden <callum@lindenlab.com> | 2022-09-15 17:00:34 -0700 |
| commit | f08f20db5f9936956c2210b73011f7e2ff45af03 (patch) | |
| tree | d8b8a5d77d65c0342c0d06a480e4382dc5ffd6ba /indra/llcommon/llsys.h | |
| parent | 5883ff178bb608b10eafe9bfa0aeb961d8afcecd (diff) | |
| parent | f83289d3a7e80bebe47f696f96aee1b7e64d1d69 (diff) | |
Merge branch 'master' into DRTVWR-568
Diffstat (limited to 'indra/llcommon/llsys.h')
| -rw-r--r-- | indra/llcommon/llsys.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/indra/llcommon/llsys.h b/indra/llcommon/llsys.h index cb92cb0ac6..5ffbf5a732 100644 --- a/indra/llcommon/llsys.h +++ b/indra/llcommon/llsys.h @@ -80,10 +80,16 @@ public: void stream(std::ostream& s) const; std::string getCPUString() const; + const LLSD& getSSEVersions() const; bool hasAltivec() const; bool hasSSE() const; bool hasSSE2() const; + bool hasSSE3() const; + bool hasSSE3S() const; + bool hasSSE41() const; + bool hasSSE42() const; + bool hasSSE4a() const; F64 getMHz() const; // Family is "AMD Duron" or "Intel Pentium Pro" @@ -92,10 +98,16 @@ public: private: bool mHasSSE; bool mHasSSE2; + bool mHasSSE3; + bool mHasSSE3S; + bool mHasSSE41; + bool mHasSSE42; + bool mHasSSE4a; bool mHasAltivec; F64 mCPUMHz; std::string mFamily; std::string mCPUString; + LLSD mSSEVersions; }; //============================================================================= |