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authorNat Goodspeed <nat@lindenlab.com>2022-11-02 12:20:05 -0400
committerNat Goodspeed <nat@lindenlab.com>2022-11-02 12:20:05 -0400
commit7b35b7baea861ae58cd01826bb57fe995dc8aa52 (patch)
treed73198b7a3f55a3644f8b0faf60a0283d5a81f17 /indra/llcommon/llsys.h
parent13456d01a71b873ed59e3839f817434357fc8da5 (diff)
parent15b5dedb2dc139c85461e7c867164b65cc6fc628 (diff)
DRTVWR-575: Merge branch 'master' into fix-monterey
Diffstat (limited to 'indra/llcommon/llsys.h')
-rw-r--r--indra/llcommon/llsys.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/indra/llcommon/llsys.h b/indra/llcommon/llsys.h
index cb92cb0ac6..5ffbf5a732 100644
--- a/indra/llcommon/llsys.h
+++ b/indra/llcommon/llsys.h
@@ -80,10 +80,16 @@ public:
void stream(std::ostream& s) const;
std::string getCPUString() const;
+ const LLSD& getSSEVersions() const;
bool hasAltivec() const;
bool hasSSE() const;
bool hasSSE2() const;
+ bool hasSSE3() const;
+ bool hasSSE3S() const;
+ bool hasSSE41() const;
+ bool hasSSE42() const;
+ bool hasSSE4a() const;
F64 getMHz() const;
// Family is "AMD Duron" or "Intel Pentium Pro"
@@ -92,10 +98,16 @@ public:
private:
bool mHasSSE;
bool mHasSSE2;
+ bool mHasSSE3;
+ bool mHasSSE3S;
+ bool mHasSSE41;
+ bool mHasSSE42;
+ bool mHasSSE4a;
bool mHasAltivec;
F64 mCPUMHz;
std::string mFamily;
std::string mCPUString;
+ LLSD mSSEVersions;
};
//=============================================================================