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| author | Erik Kundiman <erik@megapahit.org> | 2025-12-04 13:58:12 +0800 |
|---|---|---|
| committer | Erik Kundiman <erik@megapahit.org> | 2025-12-04 16:48:50 +0800 |
| commit | e3a35af2c676fb211ff7d01a79eb1a3299bc82f3 (patch) | |
| tree | 0ff7a0a15d1a53850399250b65f0a2a42f7bbf22 /indra/llcommon/llprocessor.cpp | |
| parent | ac052bed7f9f97efc63f0a0322214d4dcdcd5664 (diff) | |
| parent | c4ec3d866082d588de671e833413474d7ab19524 (diff) | |
Merge remote-tracking branch 'secondlife/release/2026.01' into 2026.01
Diffstat (limited to 'indra/llcommon/llprocessor.cpp')
| -rw-r--r-- | indra/llcommon/llprocessor.cpp | 29 |
1 files changed, 1 insertions, 28 deletions
diff --git a/indra/llcommon/llprocessor.cpp b/indra/llcommon/llprocessor.cpp index 2b6e4be1c8..bb3a35a1e3 100644 --- a/indra/llcommon/llprocessor.cpp +++ b/indra/llcommon/llprocessor.cpp @@ -764,34 +764,7 @@ private: } } - // *NOTE:Mani - I didn't find any docs that assure me that machdep.cpu.feature_bits will always be - // The feature bits I think it is. Here's a test: -#ifndef LL_RELEASE_FOR_DOWNLOAD - #if defined(__i386__) && defined(__PIC__) - /* %ebx may be the PIC register. */ - #define __cpuid(level, a, b, c, d) \ - __asm__ ("xchgl\t%%ebx, %1\n\t" \ - "cpuid\n\t" \ - "xchgl\t%%ebx, %1\n\t" \ - : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \ - : "0" (level)) - #else - #define __cpuid(level, a, b, c, d) \ - __asm__ ("cpuid\n\t" \ - : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \ - : "0" (level)) - #endif - -#if __i386__ || __x86_64__ - unsigned int eax, ebx, ecx, edx; - __cpuid(0x1, eax, ebx, ecx, edx); - if(feature_infos[0] != (S32)edx) - { - LL_WARNS() << "machdep.cpu.feature_bits doesn't match expected cpuid result!" << LL_ENDL; - } -#endif // __i386__ || __x86_64__ -#endif // LL_RELEASE_FOR_DOWNLOAD - + // @TODO: Audit our usage of machdep.cpu.feature_bits. uint64_t ext_feature_info = getSysctlInt64("machdep.cpu.extfeature_bits"); S32 *ext_feature_infos = (S32*)(&ext_feature_info); |
